This invention relates a novel switched-opamp technique for switched capacitor circuits, and in particular to a technique suitable for use at low operating voltages.
Supply voltage scaling in future submicron CMOS technology is expected to require all transistors gate-to-source (VGS) voltages to operate at less than 0.9V. Low-voltage operation is important to extend battery life in handheld devices and to allow the monolithic implementation of analog and digital circuits in a single chip. This has motivated new circuit techniques to be developed for low-voltage operation of analog circuits. Amongst these techniques are switched capacitor (SC) circuits that are capable of achieving high transfer function accuracy with low distortion in CMOS technology and are thus attractive for low-voltage operation.
FIG. 1 shows a conventional SC filter design. The design includes two operational amplifiers and a number of capacitors that are switched between phases xcfx861 and xcfx862 by switches formed of NMOS and PMOS transistors. High-gain operational amplifiers can be realized with a supply voltage as low as 1V using a standard CMOS process and there is no lower limit on the operation of the capacitors. Furthermore the MOS switches that refer to ground can be operated with VGS at less than 1V. A problem exists, however, with the MOS switch connected to the output of the first operational amplifier A1 and which is shown in the dashed line of FIG. 1. Because of the nature of the output of the operational amplifier, the MOS switch requires at least 2V for proper operation.
A number of solutions have been proposed for this problem. One proposal for example is to use low-threshold voltage devices. However, such devices are not standard to CMOS technology and thus the cost is high. Furthermore such devices suffer from heavy leakage problems. Another proposal has been to use on-chip voltage multiplier devices to drive the switches. This proposal, however, dissipates a large amount of power and is not compatible with future low-voltage submicron technology.
A more effective solution to the problem is a switched-opamp (SO) technique outlined in U.S. Pat. No. 5,745,002 (Baschirotto et al). FIG. 2 shows the basic design proposed in U.S. Pat. No. 5,745,002 and it will be noted that the problematic MOS switch of FIG. 1 is replaced by a switched opamp and capacitors as shown within the dashed line box of FIG. 2. The switched opamp and capacitors can be properly operated at 1V and below, and thus the main problem with the classical SC circuit can be overcome. The proposal of U.S. Pat. No. 5,745,002 has disadvantages of its own however.
Firstly, the previous switched-opamp technique cuts off the opamps after their integration phase, therefore it cannot implement multi-phase switched-capacitor systems and switched-capacitor techniques such as pseudo-N-path, double-sampling, capacitance-spread-reduction and same-sample-correction that require the opamps to be functional all the time. Besides, additional opamps are usually required in order to make use of the technique to realize low-voltage switched-capacitor circuits. Another disadvantage of the design of U.S. Pat. No. 5,745,002 is that the operation speed is limited by the turn on speed of the switchable opamps.
The operation speed can only be increased by using parallel processing scheme, however this requires a doubling of hardware and power consumption to double the speed and requires accurate control of the clock phases between different paths for proper operation. In addition mismatches between paths will also degrade the system performance.
According to the present invention there is provided a switched opamp circuit comprising two switchable operational amplifiers operating in parallel and in alternate clock phases.
In a preferred embodiment the two switchable operational amplifiers may be implemented by a single two-stage operational amplifier having a common input stage and two switchable output stages. In this embodiment at any given time only one of the switchable outputs is active and the other is non-active, but at any given time there is always one of the outputs active. Also in this embodiment a feedback circuit may be provided to maintain the common-mode voltage of the switchable output pairs at half the supply voltage for differential structures.
The present invention may be applied to any form of circuit that can be constructed using a switched capacitor circuit. A particularly useful realisation of the invention is as an integrator circuit which may in turn be incorporated within a filter means. It should be understood that this is an example only and that the invention may be applied to a wide range of circuit topologies.
When used in an integrator circuit, the two opamps, or the two output pairs when they are formed with a common input stage, may be provided with associated signal transformation means to provide any necessary transfer function. Examples of such signal transformation means may include feedback capacitors, or feedback switched capacitor networks.
A particular advantage of the present invention, is that one of the operational amplifiers of the switched capacitor circuit according to the present invention is always active and therefore the circuit of the present invention can be used in a range of applications where continuous operation of the operational amplifier is necessary, eg pseudo-n-path, double sampling, capacitance spread reduction and same-sample-correction techniques.
The present invention may be applied to any form of circuit that can be constructed using a switched-capacitor circuit. A particularly useful realization of the invention is a switched-capacitor integrator, which is a fundamental building block of all switched-capacitor systems. The implementation of this needs one extra capacitor only. It is therefore very simple and cost effective. More importantly, unlike the previous SO technique outlined in U.S. Pat. No. 5,745,002, the switched-capacitor integrator of the present invention acts like a classical switched-capacitor integrator due to the fact that the output signal is available for processing at both clock phases. As a result, the present invention can be directly and easily employed into most switched-capacitor systems. In fact, without employing an additional opamp, classical switched-capacitor systems can already be operated at low voltage by simply substituting the classical switched-capacitor integrators with the switched-capacitor integrator of the present invention and removing all the problematic switches that are connected to the outputs of the opamps. This shows high compatibility of the proposed switched-capacitor technique with all existing classical switched-capacitor systems.
It should be understood that these are examples only and that the invention may be applied to a wide range of circuit topologies that need the opamps to be functional all the time. For example, by replacing the extra capacitor in the previously mentioned switched-capacitor integrator with some switched-capacitor sub-circuits, multi-phase switched-capacitor techniques, e.g. pseudo-N-path, double-sampling, capacitance-spread-reduction and same-sample-correction can be implemented at low voltage with our proposed switched-opamp technique. Note that all these multi-phase switched-capacitor techniques require the opamps to be functional at all time and thus cannot be implemented with the previous switched-opamp technique. Furthermore, the present invention can also be modified to accompany multiple switchable opamps to work in parallel but in different non-overlapping clock phases to achieve complex multi-phase operation for some advanced switched-capacitor systems.